1. Field of the Invention
The present invention relates to an information processing apparatus.
2. Description of the Related Art
A conventional information processing apparatus includes a bus bridge connecting a plurality of buses, wherein one or plural bus devices can be connected to each bus. A conventional information processing apparatus can include a PCI-to-PCI bus bridge to connect two independent PCI buses. The PCI bus bridges are generally classified into transparent bus bridges and non-transparent bus bridges.
In the transparent PCI-to-PCI bus bridges, addresses of primary and secondary buses are present in the same memory space. In the non-transparent PCI-to-PCI bus bridges, addresses of primary and secondary buses are present in different memory spaces. The non-transparent PCI-to-PCI bus bridge has an address conversion function for transmitting transactions from the primary bus to the secondary bus.
The non-transparent PCI-to-PCI bus bridge can also perform address conversion to transmit transactions from the secondary bus to the primary bus. The non-transparent PCI-to-PCI bus bridge has a power control register (i.e., power management register) in an integrated circuit forming the bus bridge. The register value can be used to control the operation of bus devices connected to the primary bus and the secondary bus (for example, refer to Japanese Patent Application Laid-open No. 10-254570).
As described above, the conventional non-transparent PCI-to-PCI bus bridge includes the power management register in the integrated circuit forming the bus bridge. The register value in the power management register is constantly referred to, when the information processing apparatus is in a power saving state. Accordingly, power supply to the bus bridge cannot be stopped even in the power saving state. As a result, a significant amount of electric power is consumed in the bus bridge.